DocumentCode
2944226
Title
A 14~23 GHz CMOS MMIC distributed doubler with a 22-dB fundamental rejection
Author
Lin, Kun-You ; Huang, Jhih-Yu ; Kuo, Jing-Lin ; Lin, Chin-Shen ; Wang, Huei
Author_Institution
Dept. of Electrical Engineering and Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan, 106, R.O.C.
fYear
2008
fDate
15-20 June 2008
Firstpage
1477
Lastpage
1480
Abstract
A broadband MMIC frequency distributed doubler fabricated by 0.18-mum CMOS technology has been designed to operate from 14 to 23 GHz. In order to reject the fundamental signals, the traditional low-pass drain line was replaced by a high-pass structure. The topology can improve the fundamental rejection without additional balanced structure, thus the chip size can be minimized. This measured conversion loss is less than 14 dB and the fundamental rejection is better than 22 dB for the output frequency between 14 and 23 GHz. The chip size is only 0.54 times 0.38 mm2.
Keywords
CMOS integrated circuits; MMIC; frequency multipliers; CMOS; broadband MMIC frequency distributed doubler; frequency 14 GHz to 23 GHz; low-pass drain line; CMOS technology; Capacitors; Filters; Frequency conversion; Impedance matching; Inductors; MMICs; Metal-insulator structures; Oscillators; Topology; CMOS; MMIC; broadband; distributed doubler;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 2008 IEEE MTT-S International
Conference_Location
Atlanta, GA
ISSN
0149-645X
Print_ISBN
978-1-4244-1780-3
Electronic_ISBN
0149-645X
Type
conf
DOI
10.1109/MWSYM.2008.4633059
Filename
4633059
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