DocumentCode
2944358
Title
Managing sunset & closure of a semiconductor technology parallel to aggressive new process ramp
Author
Bouhnik, Sylvain
Author_Institution
Intel Electron. Ltd., Kiryat Gat
fYear
2007
fDate
15-17 Oct. 2007
Firstpage
1
Lastpage
4
Abstract
In the current dynamic and volatile environment of semiconductor manufacturing, factories are attempting to retool and aggressively ramp-up new technologies while ramping down existing processes. An Intel factory recently transitioned from producing 180 nm logic devices to producing 90 nm flash products. During this transition period the factory gradually discontinued its logic volume while ramping-up flash. In this paper, we will review the overall set of assumptions that were made towards the logic process ramp down and recommendations for future sunset procedures. Since some of the assumptions were materialized and some assumptions did not match reality, an extensive lessons-learned process was conducted for future technology changes.
Keywords
semiconductor device manufacture; current dynamic; semiconductor manufacturing; semiconductor technology parallel; volatile environment; Bills of materials; Capacity planning; Electronic equipment manufacture; Environmental management; Inventory management; Logic devices; Manufacturing processes; Paper technology; Production facilities; Technology management; Capacity planning; Process Deramp; Process ramp; Technology sunset; WIP management;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing, 2007. ISSM 2007. International Symposium on
Conference_Location
Santa Clara, CA
ISSN
1523-553X
Print_ISBN
978-1-4244-1142-9
Electronic_ISBN
1523-553X
Type
conf
DOI
10.1109/ISSM.2007.4446817
Filename
4446817
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