DocumentCode
2944377
Title
Economic analysis of 450mm wafer migration
Author
Chien, Chen-Fu ; Wang, J.K. ; Chang, Tzu-Ching ; Wu, Wen-Chin
Author_Institution
Taiwan Semicond. Manuf. Co, Hsinchu
fYear
2007
fDate
15-17 Oct. 2007
Firstpage
1
Lastpage
4
Abstract
To achieve the required continuous cost reduction driven by Moore´s Law, both miniaturization through technology advances and wafer size increase have been employed in order to maintain the growth and profitability of semiconductor industry. Although some technical analyses have been done for 450 mm migration, little research has been done on economic analysis to justify the decisions and thus suggest appropriate timing for 450 mm migration. This study aims to fill the gap by proposing a preliminary economic analysis to clarify some myths and facilitate further discussions concerning collaborations among the stakeholders including equipment vendors, customers, and chipmakers.
Keywords
cost reduction; electronics industry; integrated circuit economics; profitability; semiconductor device manufacture; wafer-scale integration; Moore´s Law; continuous cost reduction; economic analysis; miniaturization; profitability; semiconductor industry; size 450 mm; stakeholders; wafer migration; Collaboration; Costs; Electronics industry; Investments; Manufacturing industries; Moore´s Law; Productivity; Research and development; Semiconductor device manufacture; Timing; 450mm; Fab Economics; manufacturing strategy;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing, 2007. ISSM 2007. International Symposium on
Conference_Location
Santa Clara, CA
ISSN
1523-553X
Print_ISBN
978-1-4244-1142-9
Electronic_ISBN
1523-553X
Type
conf
DOI
10.1109/ISSM.2007.4446818
Filename
4446818
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