Feed-forward run-to-run control for reduced parametric transistor variation in CMOS logic 0.13μm technology

Targeting the physical gate Critical Dimension (CD) greatly impacts device performance. Unfortunately, advanced products within the CMOS logic 0.13 mum technology suffer from a large gate CD lot to lot variation, thereby causing large device parametric characteristics variability. A novel technique is to develop a feed-forward controller, which corrects for gate CD deviation by tuning the pocket implant dose (FFE-PI2). In order to enhance the controller robustness, a model-based Statistical Process Control (SPC) chart, and a new scatterometry grating have been considered. The FFE-PI2 control system is simulated and then implemented in STMicroelectronics 8"Fab. Results indicate a significant decrease in lot to lot variation of transistor performance.