Title :
Verification-oriented MBDD design for digital circuits
Author :
Xinhua, He ; Shuomei, Liu
Author_Institution :
Armored Force Eng. Inst., Beijing, China
Abstract :
Efficient manipulation of Boolean functions is an important component of many CAD tasks. In this paper, a new and practical State Transition Graph (STG) construction method, which is based on the appending operation from standard gate MBDD (Max/Min Standard BDD Construction) is proposed. Obviously, a reduced STG in which the inputs and states are collapsed, is obtained. Finally, several experiment results are shown the effectiveness of the method
Keywords :
Boolean functions; circuit CAD; digital circuits; formal verification; graph theory; logic CAD; Boolean functions; CAD; STG construction method; appending operation; digital circuits; max/min standard BDD construction; standard gate MBDD; state transition graph; verification-oriented MBDD design; Binary decision diagrams; Boolean functions; Data structures; Design automation; Digital circuits; Digital systems; Helium; Input variables; Packaging; Power engineering and energy;
Conference_Titel :
ASIC, 1996., 2nd International Conference on
Conference_Location :
Shanghai
Print_ISBN :
7-5439-0940-5
DOI :
10.1109/ICASIC.1996.562745
