Title :
Manufacturing challenges and method of fabrication of on-chip capacitive digital isolators
Author :
Mahalingam, Pushpa ; Guiling, David ; Lee, Sunny
Author_Institution :
Texas Instrum., Dallas
Abstract :
A robust and innovative method of fabrication of on-chip capacitive digital isolators integrated in a high precision analog CMOS process is presented in this paper. Several dielectric materials such as TEOS, HDP, silicon nitride, silicon oxynitride, with different film stresses were evaluated for this capacitor in order to achieve the high breakdown voltage (RMS and surge) requirements of the isolation capacitor while ensuring wafer manufacturability. Impact of various integration schemes and combinations of the dielectric layers on the capacitor breakdown voltage performance along with a package and wafer-level reliability assessment of these integration schemes is discussed.
Keywords :
CMOS digital integrated circuits; integrated circuit manufacture; integrated circuit reliability; capacitor breakdown voltage performance; dielectric materials; fabrication method; film stresses; high precision analog CMOS process; isolation capacitor; manufacturing challenges; on-chip capacitive digital isolators; wafer manufacturability; wafer-level reliability assessment; CMOS process; Capacitors; Dielectric materials; Fabrication; Isolators; Manufacturing; Robustness; Semiconductor films; Silicon; Stress;
Conference_Titel :
Semiconductor Manufacturing, 2007. ISSM 2007. International Symposium on
Conference_Location :
Santa Clara, CA
Print_ISBN :
978-1-4244-1142-9
Electronic_ISBN :
1523-553X
DOI :
10.1109/ISSM.2007.4446870
