DocumentCode
2945397
Title
Optimization of thick resist in 90nm mirror- bit® flash memory to improve sector edge cell threshold voltage
Author
Chen, J.J. ; Yazdani, Nasser ; Shiraiwa, H. ; Lingunis, M. ; Kamal, Tariq ; Karlsson, O. ; Banerjee, Biplab
Author_Institution
Spansion Inc., Austin
fYear
2007
fDate
15-17 Oct. 2007
Firstpage
1
Lastpage
3
Abstract
In this paper, we describe the characterization and optimization of thick resist in 90 nm flash memory processing to improve sector-edge cell threshold voltage (Vt) uniformity. It was observed that upon high-energy implantation, edge footing of thick resist increased sufficiently to allow some possible unintentional dopant penetration into sector WL regions, lowering sector edge Vt. Careful characterization and optimization of thick resist, coupled with layout modification, was successful in eliminating low sector-edge Vt and improving Vt uniformity by up to 20%.
Keywords
flash memories; resists; flash memory; sector edge cell threshold voltage; size 90 nm; thick resist; Character generation; Design optimization; Flash memory; Foot; Implants; Resists; Thickness control; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing, 2007. ISSM 2007. International Symposium on
Conference_Location
Santa Clara, CA
ISSN
1523-553X
Print_ISBN
978-1-4244-1142-9
Electronic_ISBN
1523-553X
Type
conf
DOI
10.1109/ISSM.2007.4446876
Filename
4446876
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