Title :
Implementation of the IPv6 datagram processing on the FPGA chips
Author :
Bozovic, Rade ; Simljanic, Aleksandra ; Cica, Zoran
Abstract :
This work presents the VHDL design of the IPv6 datagram processing module. The aim of the module is to process IPv6 datagram header, then to forward relevant data from the header to output ports, as well as to forward the complete IPv6 header to the output ports. Design of the module and simulation for its verification of its performance was done in Active HDL, while synthesys was done in the Xilinx software.
Keywords :
IP networks; field programmable gate arrays; hardware description languages; integrated circuit design; FPGA chips; IPv6 datagram processing module; VHDL design; Xilinx software; active HDL; datagram header; synthesys; Electronic mail; Field programmable gate arrays; Hardware design languages; IP networks; Internet; Ports (Computers); Protocols; IPv6; VHDL;
Conference_Titel :
Telecommunications Forum (TELFOR), 2013 21st
Conference_Location :
Belgrade
Print_ISBN :
978-1-4799-1419-7
DOI :
10.1109/TELFOR.2013.6716169
