Detection and review of crystal originated surface and sub surface defects on bare silicon

The continuous dimensional reduction for micro-and nano electronics is driving the technology for yield relevant defect detection. Defects originating in the crystal are always present in silicon wafers. Due to miniaturization, the size of these defects becomes comparable to the feature sizes of future technology generations. Therefore, they are identified as a future yield limiting mechanism. This paper shows that crystal originated sub surface defects impact the performance of dark Held Scanning Surface Inspection Systems with respect to defect counts, defect classification, defect sizing, and capture rate.