• DocumentCode
    2947390
  • Title

    Checked Load: Architectural support for JavaScript type-checking on mobile processors

  • Author

    Anderson, Owen ; Fortuna, Emily ; Ceze, Luis ; Eggers, Susan

  • Author_Institution
    Comput. Sci. & Eng., Univ. of Washington, Seattle, WA, USA
  • fYear
    2011
  • fDate
    12-16 Feb. 2011
  • Firstpage
    419
  • Lastpage
    430
  • Abstract
    Dynamic languages such as Javascript are the de-facto standard for web applications. However, generating efficient code for dynamically-typed languages is a challenge, because it requires frequent dynamic type checks. Our analysis has shown that some programs spend upwards of 20% of dynamic instructions doing type checks, and 12.9% on average. In this paper we propose Checked Load, a low-complexity architectural extension that replaces software-based, dynamic type checking. Checked Load is comprised of four new ISA instructions that provide flexible and automatic type checks for memory operations, and whose implementation requires minimal hardware changes. We also propose hardware support for dynamic type prediction to reduce the cost of failed type checks. We show how to use Checked Load in the Nitro JavaScript just-in-time compiler (used in the Safari 5 browser). Speedups on a typical mobile processor range up to 44.6% (with a mean of 11.2%) in popular JavaScript benchmarks. While we have focused our work on JavaScript, Checked Load is sufficiently general to support other dynamically-typed languages, such as Python or Ruby.
  • Keywords
    Java; instruction sets; mobile computing; program compilers; program diagnostics; Checked Load; ISA instructions; JavaScript architectural support; Nitro JavaScript just-in-time compiler; Web applications; dynamic instructions; dynamic languages; dynamic type checking; dynamic type checks; dynamically-typed languages; low-complexity architectural extension; memory operations; mobile processors; software-based checking; type-checking; Arrays; Benchmark testing; Cryptography; Hardware; Instruments; Mobile communication; Program processors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computer Architecture (HPCA), 2011 IEEE 17th International Symposium on
  • Conference_Location
    San Antonio, TX
  • ISSN
    1530-0897
  • Print_ISBN
    978-1-4244-9432-3
  • Type

    conf

  • DOI
    10.1109/HPCA.2011.5749748
  • Filename
    5749748