Optimal pin-assignment for ground noise minimization in IC packages and connectors

With the rapid increase in operating frequency in today´s VLSI systems, signal integrity due to VLSI packages and interconnects becomes one of the critical factors in the overall design. This paper addresses the signal integrity based design optimization of packages and connectors by using simulated annealing and genetic algorithms. A 2-dimensional genetic algorithm is developed for 2-dimensional pin assignment. To indicate the effectiveness of the method, three examples are presented for ground noise minimization using 1 and 2-dimensional pin assignment optimization techniques. Both methods achieved signal integrity improvements under realistic running times