DocumentCode
2948056
Title
Design and simulation of high gain PHEMT low noise amplifier (LNA)
Author
Rizk, Mohamed ; Nasar, Mohamed ; Hafez, Alaa
Author_Institution
Alexandria Univ., Alexandria
fYear
2007
fDate
27-29 Nov. 2007
Firstpage
253
Lastpage
257
Abstract
This paper presents a 5.8 GHz low voltage, low power, and wide band LNA design using PHEMT transistor. The simulated LNA is a single stage with pi input and output matching circuits. The noise canceling principle and sensitivity analysis is performed for the simulated low noise amplifiers. The simulated results are compared with identical LNA published and give a significant increase in the gain by more than 23 % at the same noise figure, input and output return loss. Another LNA is optimized in the design to achieve a maximum gain with low noise figure and input, output return loss which gives a maximum gain of 16 dB at 3GHz frequency with 0.65 Noise figure.
Keywords
low noise amplifiers; low-power electronics; power HEMT; power transistors; semiconductor device models; sensitivity analysis; PHEMT transistor; frequency 5.8 GHz; high gain PHEMT low noise amplifier simulation; input matching circuits; noise canceling principle; output matching circuits; sensitivity analysis; wide band LNA design; Circuit noise; Circuit simulation; Impedance matching; Low voltage; Low-noise amplifiers; Noise cancellation; Noise figure; PHEMTs; Sensitivity analysis; Wideband;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Engineering & Systems, 2007. ICCES '07. International Conference on
Conference_Location
Cairo
Print_ISBN
978-1-4244-1365-2
Electronic_ISBN
978-1-1244-1366-9
Type
conf
DOI
10.1109/ICCES.2007.4447056
Filename
4447056
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