DocumentCode
2948362
Title
An industrial-strength design flow in just fifteen easy weeks!
Author
Frenzel, James F.
Author_Institution
Dept. of Electr. Eng., Idaho Univ., Moscow, ID, USA
fYear
1997
fDate
21-23 Jul 1997
Firstpage
53
Lastpage
54
Abstract
Educators continue to face pressure from students and industry to employ the newest technology in the classroom. With regard to VLSI design and the role of CAD tools, a balance must be struck between fundamentals and training to a particular software package. This paper describes a semester project, suitable for an undergraduate VLSI course, which emphasized the design process, rather than individual tools. This process and the experiences associated with producing a pipelined, two´s complement binary multiplier are presented
Keywords
VLSI; circuit CAD; electronic engineering education; integrated circuit design; CAD tool; VLSI design; pipelined binary multiplier; software package; undergraduate education; Algorithm design and analysis; CMOS process; Design automation; Education; Fabrication; Graphics; Process design; SPICE; Software packages; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Systems Education, 1997. MSE '97. Proceedings., 1997 IEEE International Conference on
Conference_Location
Arlington, VA
Print_ISBN
0-8186-7996-4
Type
conf
DOI
10.1109/MSE.1997.612544
Filename
612544
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