Calibration of sampling instants in a multiple channel time-interleaved analog-to-digital converter

The clock-skew error in time-interleaved analog-to-digital converters importantly degrades their linearity. This paper presents a digital circuit to detect these errors. It has a simpler hardware implementation than the previously presented methods and it is the first directly generalizable to any number of channels. Moreover, it is insensible to gain-mismatch and random jitter. To illustrate it, a new detection and correction scheme for sampling instants calibration is proposed.