DocumentCode
2949376
Title
On-chip multi-layer perceptron and time-delay neural networks for phoneme recognition
Author
Gatt, E. ; Micallef, J. ; Chilton, E.
Author_Institution
Dept. of Microelectron., Univ. of Malta, Msida
fYear
2005
fDate
11-14 Dec. 2005
Firstpage
1
Lastpage
4
Abstract
This paper presents a back-propagation neural network for phoneme recognition. The neural network has been implemented on-chip using 0.35 mum three-metal dual-poly CMOS technology. The results obtained for multi-layer perceptrons (MLP) and time-delay neural network (TDNN) implementations for phoneme recognition systems are presented. The paper also presents the performance characteristics for the chip.
Keywords
CMOS integrated circuits; backpropagation; multilayer perceptrons; neural chips; neural net architecture; speech recognition; CMOS technology; multilayer perceptron; neural net chip architecture; phoneme recognition; size 0.35 mum; time-delay neural networks; CMOS technology; Circuits; Feedforward neural networks; Multi-layer neural network; Multilayer perceptrons; Network-on-a-chip; Neural networks; Neurons; Recurrent neural networks; Signal generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2005. ICECS 2005. 12th IEEE International Conference on
Conference_Location
Gammarth
Print_ISBN
978-9972-61-100-1
Electronic_ISBN
978-9972-61-100-1
Type
conf
DOI
10.1109/ICECS.2005.4633379
Filename
4633379
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