An efficient algorithm and architecture for natural logarithm using Maclaurin series

An algorithm for the computation of the natural logarithm using Maclaurin series is presented in this paper. The algorithm utilizes only the first two terms in Maclaurin series to compute logarithm function. A pipelined architecture implementing our algorithm is proposed and its execution time is estimated based on the rough model for the delay estimate of the main logic blocks. The execution time is also obtained for a target precision of 32 bits. The proposed architecture is compared with conventional radix-2 and high-radix digit-recurrence algorithm showing that the proposed architecture requires less execution time for higher precision.