Title :
A low-triggering circuitry for dual-direction ESD protection
Author :
Wang, Albert Z. ; Tsay, Chen H.
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA
Abstract :
A novel low-triggering, dual-direction on-chip Electrostatic Discharge (ESD) protection circuitry is designed to protect integrated circuits (ICs) against ESD surges in two opposite directions. The compact circuit features low triggering (7.5 V), short response time (<1 ns), symmetric deep snapback I-V characteristics, and low on-resistance (~Ω). It passed 14 kV HEM ESD test and is very area efficient (80 V/μm). The design was predicted by simulation that fits measurement
Keywords :
BiCMOS integrated circuits; electrostatic discharge; integrated circuit reliability; protection; trigger circuits; 1 ns; 14 kV; 7.5 V; ESD surges; dual polarity ESD protection; dual-direction ESD protection; electrostatic discharge protection; integrated circuit protection; low on-resistance; low-triggering circuitry; onchip ESD protection circuitry; symmetric deep snapback I-V characteristics; BiCMOS integrated circuits; Clamps; Electrostatic discharge; Equivalent circuits; Low voltage; Neodymium; Solids; Stress; Surge protection; Thyristors;
Conference_Titel :
Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-5443-5
DOI :
10.1109/CICC.1999.777260
