Digital detection of parametric faults in data converters

Author

Vinnakota, Bapiraju ; Harjani, Ramesh

Author_Institution

Minnesota Univ., Minneapolis, MN, USA

fYear

1999

fDate

1999

Firstpage

151

Lastpage

154

Abstract

Multiple parametric faults due to normal process variations are extremely important for analog circuits. Very few analog DFT techniques target multiple parametric faults. In this paper we present a DFT scheme that targets high performance analog circuits. In particular, we target a popular switched-capacitor based A/D converter. The DFT scheme is based on an analog-to-digital capacitor ratio converter circuit. The circuit is used to completely characterize the transfer function of a charge redistribution A/D converter. Extensive simulation results that include practical process variations are used to verify our DFT scheme

Keywords

analogue integrated circuits; analogue-digital conversion; design for testability; fault diagnosis; integrated circuit design; integrated circuit testing; monolithic integrated circuits; switched capacitor networks; transfer functions; ADC capacitor ratio converter circuit; DFT technique; SC-based A/D converter; analog circuits; analog-to-digital converter; charge redistribution ADC; data converters; digital detection; parametric faults; switched-capacitor based ADC; transfer function; Analog circuits; Analog-digital conversion; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Switched capacitor circuits; Switching converters; Transfer functions; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999

Conference_Location

San Diego, CA

Print_ISBN

0-7803-5443-5

Type

conf

DOI

10.1109/CICC.1999.777263

Filename

777263