DocumentCode :
2951788
Title :
Ultra low power 2-tier 3D stacked sub-threshold H.264 intra frame encoder
Author :
Samal, Sandeep Kumar ; Kiyoung Kim ; Youngchan Kim ; Taesung Kim ; Hyuk-Jae Lee ; Taewhan Kim ; Sung Kyu Lim
Author_Institution :
Sch. of ECE, Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
2013
fDate :
7-10 Oct. 2013
Firstpage :
1
Lastpage :
2
Abstract :
Digital circuits used in sensor networks require longer battery life and do not demand a fast frequency of operation. Sub-threshold circuits for such applications are an attractive option. Three dimensional ICs (3DICs) on the other hand is an emerging technology which helps in miniaturization and reduction in interconnects, resulting in power saving and performance improvement. Several works on sub-threshold circuits and TSV based 3DICs have been studied independently but none have studied the impact of 3D stacking of sub-threshold circuits. We design and study an ultra-low power 2-tier 3D sub-threshold implementation of H.264 intra frame encoder that encodes video frames. The encoder consumes 0.73μW power at 16.13 KHz clock frequency for a typical application of encoding a Common Image Format (CIF) frame. The motivation is to assess the feasibility of the use of extreme low power video encoders in image sensor based sensor networks. Low power operation is highly beneficial to such unattended sensor networks by extending their battery life. Sub-threshold design helps us in this respect while 3D stacking minimizes footprint area, helps in off-chip to on-chip memory integration and improves timing performance.
Keywords :
digital integrated circuits; integrated circuit design; low-power electronics; three-dimensional integrated circuits; video codecs; 3D stacking; 3DIC; CIF frame; TSV; common image format; digital circuits; frequency 16.13 kHz; performance improvement; power 0.73 muW; power saving; sensor networks; subthreshold circuits; subthreshold design; three dimensional IC; through-silicon-via; ultra low power 2-tier 3D stacked sub-threshold H.264 intraframe encoder; Clocks; Layout; Low-power electronics; Stacking; Standards; Three-dimensional displays; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2013 IEEE
Conference_Location :
Monterey, CA
Type :
conf
DOI :
10.1109/S3S.2013.6716532
Filename :
6716532
Link To Document :
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