Title :
Facilitating interconnect-based VLSI design
Author :
Mangaser, Ramoln ; Rose, Kenneth
Author_Institution :
Dept. of Electr. Comput. & Syst. Eng., Rensselaer Polytech. Inst., Troy, NY, USA
Abstract :
Since interconnect is becoming a limiting constraint for microelectronics technology, VLSI design curricula and supporting CAD tools require significant change. We describe the introduction of Rensselaer´s interconnect performance estimator (RIPE) into a VLSI design class
Keywords :
VLSI; circuit CAD; electronic engineering education; integrated circuit design; integrated circuit interconnections; CAD tool; Rensselaer interconnect performance estimator; VLSI design; educational curriculum; microelectronics technology; Clocks; Design automation; Integrated circuit interconnections; Logic devices; Logic gates; Microelectronics; Power dissipation; Power system interconnection; Very large scale integration; Wiring;
Conference_Titel :
Microelectronic Systems Education, 1997. MSE '97. Proceedings., 1997 IEEE International Conference on
Conference_Location :
Arlington, VA
Print_ISBN :
0-8186-7996-4
DOI :
10.1109/MSE.1997.612584
