DocumentCode
2951977
Title
Converting an SRAM from bulk Si to partially depleted SOI
Author
Wood, Michael ; Smith, George ; Pennings, John
Author_Institution
IBM Mid Hudson Valley High Performance Design Center, Poughkeepsie, NY, USA
fYear
1999
fDate
1999
Firstpage
227
Lastpage
230
Abstract
The conversion of an existing standard cell compatible SRAM macro to a partially depleted SOI process is described. The issues discovered in the conversion were: changed coupling capacitance and noise analysis, history effects in the sense amplifier, setup and hold time analysis and thermal effects. For each of these effects the steps taken to meet functionality requirements are explained
Keywords
CMOS memory circuits; SRAM chips; integrated circuit design; integrated circuit noise; silicon-on-insulator; SRAM; coupling capacitance; functionality requirements; hold time analysis; noise analysis; partially depleted SOI; sense amplifier; setup time analysis; thermal effects; CMOS process; Capacitance; Copper; Coupling circuits; Decoding; Delay; History; Random access memory; Silicon on insulator technology; Turning;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999
Conference_Location
San Diego, CA
Print_ISBN
0-7803-5443-5
Type
conf
DOI
10.1109/CICC.1999.777279
Filename
777279
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