Title :
Dual-threshold design of sub-threshold circuits
Author :
Jia Yao ; Agrawal, Vishwani D.
Author_Institution :
Dept. of ECE, Auburn Univ., Auburn, AL, USA
Abstract :
Dual threshold voltage (Vth) design is a common method for reducing leakage power in above-threshold circuits. This research shows that it is also effective in reducing energy per cycle of sub-threshold circuits. We first study the single-Vth design theoretically and by simulations, and find that the energy per cycle is independent of threshold voltage. However, in a dual-Vth design, the energy per cycle depends on both threshold voltage and supply voltage. We propose a framework to further reduce energy per cycle below what is possible with a single Vth. Given a nominal value for Vth, we determine an optimal supply voltage Vdd and an optimal higher Vth. Application to a 32-bit ripple carry adder shows energy saving of 29% over the single-Vth lowest energy.
Keywords :
adders; logic design; network synthesis; above-threshold circuit; dual-threshold voltage design; energy per cycle reduction; leakage power reduction; ripple carry adder; single-Vth lowest energy; subthreshold circuit design; word length 32 bit; CMOS integrated circuits; Capacitance; Clocks; Delays; Integrated circuit modeling; Logic gates; Threshold voltage;
Conference_Titel :
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2013 IEEE
Conference_Location :
Monterey, CA
DOI :
10.1109/S3S.2013.6716544