Mesh-of-Tree Based Scalable Network-on-Chip Architecture

Author

Kundu, Santanu ; Dasari, Radha Purnima ; Chattopadhyay, Santanu ; Manna, Kanchan

Author_Institution

Dept. of Electron. & Electr. Commun. Eng., Indian Inst. of Technol., Kharagpur

fYear

2008

fDate

8-10 Dec. 2008

Firstpage

1

Lastpage

6

Abstract

Scalability has become an important consideration in Network-on-Chip (NoC) designs. The word scalability has been widely used in the parallel processing community. For massively parallel computing, a scalable system has the property that performance will increase linearly with the system size. The scalability analysis may be used to select the best architecture for a problem under different constraints on the growth of the problem size and the number of processors. In this paper, we have analyzed the scalability issue of Mesh-of-Tree topology based network.

Keywords

network-on-chip; parallel processing; mesh-of-tree; parallel processing; scalable network-on-chip architecture; Computational modeling; Computer architecture; Network servers; Network topology; Network-on-a-chip; Parallel processing; Region 10; Scalability; System recovery; System-on-a-chip; Cycle Accurate Simulator; Mesh-of-Tree (MoT); Network-on-Chip (NoC); Scalability; System-on-Chip (SoC);

fLanguage

English

Publisher

ieee

Conference_Titel

Industrial and Information Systems, 2008. ICIIS 2008. IEEE Region 10 and the Third international Conference on

Conference_Location

Kharagpur

Print_ISBN

978-1-4244-2806-9

Electronic_ISBN

978-1-4244-2806-9

Type

conf

DOI

10.1109/ICIINFS.2008.4798389

Filename

4798389