Embedded VLSI Accelerators for Fingerprint Signal Processing

Personal identification based on biometrics is nowadays an emerging research subject. Several physiological and behavioral human characteristics have been suggested in the last decades as discriminating features to be used in personal recognition. Among them, fingerprint is the most widely used technique due to its high discriminating power. However, matching fingerprints in an automatic way is still a technical challenge. A compromise in the system performance exists: accuracy, security, real-time and cost are some of the critical points to face up to. The main contribution of this work is focused on the physical implementation of the recognition system. The design of an embedded system developed by means of hardware/software co-design techniques highlights much more advantages than those traditional software-based solutions. The introduction of programmable logic into the system permits the synthesis of application-specific hardware accelerators to speed up those computationally-expensive signal processing tasks, while keeping the rest of less expensive tasks under the control of a general-purpose microprocessor. The selected system architecture and the proper hardware-software partitioning of the application have made possible the development of an automatic fingerprint matcher system featuring real-time performance at an affordable cost, what is not guaranteed when developing the same matching algorithm under a purely-software platform.