Graph Reduction Algorithm for Hardware/Software Partitioning

One of the most crucial steps in the design of embedded systems is Hardware/Software(HW/SW) partitioning, that is, deciding which components of the system should be implemented in hardware and which ones in software. Most formulations of the HW/SW partitioning problem are NP-hard, so most of the research efforts on HW/SW partitioning has focused on developing efficient heuristic. In this paper , we did not committed to finding effective methods of HW/SW partitioning, but focusing on the pre-process for the task graph before the HW/SW partitioning, and to find all the sub-graphs which meet the requirements. Simplification of the original task graph, so that the partitioning will be more accurately and faster, and it also can save the hardware area effectively.