DocumentCode
2952206
Title
Scaling perspectives of ULV microcontroller cores to 28nm UTBB FDSOI CMOS
Author
de Streel, Guerric ; Bol, David
Author_Institution
ICTEAM Inst., Univ. catholique de Louvain, Louvain-la-Neuve, Belgium
fYear
2013
fDate
7-10 Oct. 2013
Firstpage
1
Lastpage
2
Abstract
Short-channel effects and variability in bulk technologies limit the interest of CMOS technology scaling for ultra-low-voltage (ULV) logic below 65nm because of the resulting penalty in the energy efficiency. FDSOI has already been predicted to be a good candidate to keep an excellent energy efficiency while increasing speed at ULV. In this paper, we confirm this result by synthesis results of microcontrollers at 0.35V. We show that the use of a mix of overdrive forward back biasing (FBB) voltages in 28nm FDSOI further improves the energy efficiency. Compare to bulk 65nm CMOS, we were able to reduce the energy per cycle by 64% or increase the frequency of operation by 7x while maintaining energy per operation below 3μW/MHz over a wide frequency range.
Keywords
CMOS logic circuits; buried layers; integrated circuit design; low-power electronics; microcontrollers; silicon-on-insulator; ULV microcontroller core; UTBB FDSOI CMOS; bulk technology variability; buried oxide layer; energy efficiency; overdrive forward back biasing voltages; short channel effect; size 28 nm; ultralow voltage logic; ultrathin body BOX fully depleted CMOS; voltage 0.35 V; voltage scaling; CMOS integrated circuits; Energy efficiency; Gate leakage; Libraries; Logic gates; Microcontrollers; Robustness;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2013 IEEE
Conference_Location
Monterey, CA
Type
conf
DOI
10.1109/S3S.2013.6716553
Filename
6716553
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