DocumentCode :
2952367
Title :
GNSS Receiver Based on a SDR Architecture Using FPGA Devices
Author :
Meraz, Miguel Sánchez ; Arvizu, Juan Manuel Castro ; Cruz, Amadeo José Argüelles
Author_Institution :
Centro de Investig. en Comput., Inst. Politec. Nac., Mexico City, Mexico
fYear :
2011
fDate :
15-18 Nov. 2011
Firstpage :
383
Lastpage :
388
Abstract :
This paper presents the development of a FPGA based GNSS receiver. The developed prototype is based on a Software Radio Architecture and integrates all the main GPS signal processing algorithms as IP modules do. Furthermore, description of a developed system for the acquisition, tracking and position computation algorithms is described. The obtained results display that the positioning obtained with this prototype is closer to the real user position.
Keywords :
Global Positioning System; field programmable gate arrays; radio receivers; satellite navigation; software radio; FPGA devices; GNSS receiver; GPS signal processing algorithms; Global Navigation Satellite system; IP modules; SDR architecture; position computation algorithms; software radio architecture; Computer architecture; Field programmable gate arrays; Global Positioning System; Receivers; Satellites; Software; FPGA based receiver; GNSS receiver; GPS signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Robotics and Automotive Mechanics Conference (CERMA), 2011 IEEE
Conference_Location :
Cuernavaca, Morelos
Print_ISBN :
978-1-4577-1879-3
Type :
conf
DOI :
10.1109/CERMA.2011.70
Filename :
6125861
Link To Document :
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