Title :
Reconfigurable SIMD units for image processing
Author :
Aguado, David ; Revenga, Pedro ; Lazaro, Jose Luis ; Derutin, TJean Pierre
Author_Institution :
Univ. de Alcala, Alcala de Henares
Abstract :
This paper shows a new kind of parallel computing architecture, applied to image processing in real-time embedded vision environments. The architecture proposed is based on processing elements built in FPGAs silicon but it shows a novel concept: custom reconfigurable SIMD modules, for image processing, attached to the processor pipeline. In order to assess the validity of the proposal, two previous prototypes with commercial processors, performing a stabilization algorithm, have been built and they are described.
Keywords :
computer vision; field programmable gate arrays; multiprocessing systems; parallel architectures; pipeline processing; reconfigurable architectures; FPGA silicon; image processing; multiprocessor; parallel computing architecture; processor pipeline; real-time embedded vision environment; reconfigurable SIMD units; stabilization algorithm; Computer architecture; Field programmable gate arrays; Hardware; Image processing; Laboratories; Microprocessors; Parallel processing; Programming profession; Registers; Silicon; FPGA; SIMD; image processing; multiprocessor;
Conference_Titel :
Intelligent Signal Processing, 2007. WISP 2007. IEEE International Symposium on
Conference_Location :
Alcala de Henares
Print_ISBN :
978-1-4244-0829-0
Electronic_ISBN :
978-1-4244-0830-6
DOI :
10.1109/WISP.2007.4447580
