• DocumentCode
    2952704
  • Title

    A 13T radiation hardened SRAM bitcell for low-voltage operation

  • Author

    Atias, Lior ; Teman, Adam ; Fish, Alexander

  • fYear
    2013
  • fDate
    7-10 Oct. 2013
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    In this work, a radiation hardened low-voltage memory cell for ultra-low power operation is proposed. The proposed 13T bitcell is implemented in a standard 0.18μm CMOS process and is shown to tolerate upsets with charge deposits as high as 500 fC through a dual-driven internal self-correction mechanism.
  • Keywords
    CMOS integrated circuits; SRAM chips; low-power electronics; radiation hardening (electronics); CMOS process; dual-driven internal self-correction mechanism; low-voltage operation; radiation hardened SRAM bitcell; radiation hardened low-voltage memory cell; size 0.18 mum; ultralow power operation; Discharges (electric); Inverters; Low-power electronics; Radiation hardening (electronics); Random access memory; Standards; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2013 IEEE
  • Conference_Location
    Monterey, CA
  • Type

    conf

  • DOI
    10.1109/S3S.2013.6716579
  • Filename
    6716579
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2952704