DocumentCode :
2952719
Title :
Including inductive effects in interconnect timing analysis
Author :
Krauter, Byron ; Mehrotra, Sharad ; Chandramouli, V.
Author_Institution :
IBM Corp., Austin, TX, USA
fYear :
1999
fDate :
1999
Firstpage :
445
Lastpage :
452
Abstract :
Including inductive effects in interconnect timing analysis has become increasingly important in today´s deep submicron designs. In this tutorial paper we will describe the technology trends that brought us to this juncture, summarize when inductance should be included, and consider some of the extraction and modeling techniques available. This coverage will not be an exhaustive summary of all the extraction and analysis techniques available, but one that is primarily focused on extraction methods that efficiently capture frequency dependence due to proximity effects and moment-based analysis techniques
Keywords :
VLSI; circuit simulation; delay estimation; equivalent circuits; inductance; integrated circuit interconnections; integrated circuit layout; integrated circuit modelling; lumped parameter networks; method of moments; timing; VLSI; coupled RL circuit; deep submicron design; effective capacitance; extraction techniques; frequency dependence; gate delay; inductive effects; interconnect timing analysis; lumped circuit models; modeling techniques; moment-based analysis techniques; proximity effects; tutorial; Clocks; Delay effects; Frequency dependence; Impedance; Inductance; Integrated circuit interconnections; Propagation delay; RLC circuits; Timing; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-5443-5
Type :
conf
DOI :
10.1109/CICC.1999.777320
Filename :
777320
Link To Document :
بازگشت