Return-limited inductances: a practical approach to on-chip inductance extraction

This paper proposes a practical approach for extracting approximate inductances of on-chip interconnect. This approach, which we call the method of return-limited inductances, is based on performing the inductance modeling of signal lines and power-ground lines independently and on taking advantage of the power-ground distribution of the chip to localize inductive coupling. Results from representative on-chip interconnect examples demonstrate the efficiency and accuracy of this approach over other sparsification techniques