Design of a novel low loss fault current limiter for medium-voltage systems

It has been proven that fault current limiters (FCL) based on power semiconductors offer many advantages compared to mechanical circuit breakers, e.g. improved voltage quality during short circuit and reduced short circuit current. However, all presented solutions have major drawbacks concerning material costs and on-state losses, which prevent a realization of these systems. In this paper a different solid-state circuit breaker concept will be presented, which uses thyristors for an active current interruption. Thyristors offer a significant reduction in both on-state losses and material costs. Consequently, these topologies could lead to a wider integration of solid-state circuit breakers in present grids due to an increased economical performance compared to solid-state concepts with turn-off semiconductors. After a brief introduction to the topic and a presentation of the fundamentals, four different topologies will be described. Whereas two of these solutions are known in literature the others are newly developed. Afterwards, simulation results will be presented and the topologies will be compared under technical and economical aspects.