DocumentCode
2952955
Title
A 3.25 Gb/s injection locked CMOS clock recovery cell
Author
Gabara, Thaddeus
Author_Institution
Lucent Technol., AT&T Bell Labs., Murray Hill, NJ, USA
fYear
1999
fDate
1999
Firstpage
521
Lastpage
524
Abstract
A clock signal embedded in a NRZ (Non Return to Zero) 231 -1 pseudo-random data stream is used to injection lock a slave CMOS LC tank circuit. The slave oscillator in turn generates a clock signal responsive to this stimulus and is used to capture the data. A measured Bit Error Rate (BER) of less than 2E-15 at 3 Gb/s is achieved using conventional 0.25 μm CMOS and dissipating less than 50 mW. Differential clock recovery can be performed with as little as four active devices
Keywords
CMOS digital integrated circuits; clocks; injection locked oscillators; synchronisation; 0.25 micron; 3.25 Gbit/s; 50 mW; CMOS clock recovery cell; LC tank circuit; NRZ pseudo-random data stream; active device; bit error rate; injection locking; slave oscillator; CMOS technology; Circuits; Clocks; Delay; Frequency; Injection-locked oscillators; Inverters; Ring oscillators; Signal generators; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999
Conference_Location
San Diego, CA
Print_ISBN
0-7803-5443-5
Type
conf
DOI
10.1109/CICC.1999.777335
Filename
777335
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