Versatile beamforming ASIC architecture for broadband fixed wireless access

Author

Duan, Ji-Ning ; Ko, LiJen ; Daneshrad, Babak

Author_Institution

Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA

fYear

1999

fDate

1999

Firstpage

545

Lastpage

548

Abstract

This paper describes a highly flexible VLSI ASIC architecture targeted for use in present and future broadband fixed wireless access communication systems. The architecture features a novel structure for variable rate interpolation that allows it to operate at any user specified symbol rate from 625 kBaud to 10 MBaud. A unique shaping filter structure with programmable CSD coefficients is also implemented. The signal flow paths can also be reversed allowing the chip to be used in both the transmitter and the receiver portions of a communication system. Finally, anticipating operation in a TDMA network, all user programmable features can be quickly changed for each time slot

Keywords

CMOS digital integrated circuits; VLSI; application specific integrated circuits; array signal processing; digital filters; digital signal processing chips; interpolation; radio access networks; telecommunication computing; TDMA network; beamforming ASIC architecture; broadband fixed wireless access; flexible VLSI ASIC architecture; programmable CSD coefficients; shaping filter structure; signal flow paths reversal; user specified symbol rate; variable rate interpolation; Application specific integrated circuits; Array signal processing; Filters; Interference; Interpolation; Multiaccess communication; Time division multiple access; Very large scale integration; Wireless communication; Wireless networks;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999

Conference_Location

San Diego, CA

Print_ISBN

0-7803-5443-5

Type

conf

DOI

10.1109/CICC.1999.777340

Filename

777340