DocumentCode :
2953082
Title :
The Design and Simulation of Frequency Divider Based on VHDL
Author :
Yu Yaping ; Wei Yong ; Liu Yuan ; Du Yanhong ; Zhao Jincai
Author_Institution :
Dept. of Mechanic & Electron. Eng., Tianj in Agric. Univ., Tianjin, China
fYear :
2011
fDate :
30-31 July 2011
Firstpage :
1
Lastpage :
3
Abstract :
This paper introduces the principle of frequency divider and circuit design based on VHDL, which describes integer and half-integer frequency division and the decimal frequency division algorithms. It can achieve any number divider for base frequency. The generality of this design is good. It can be used into the design of diverse digital circuit systems.
Keywords :
digital circuits; frequency dividers; hardware description languages; integrated circuit design; VHDL; base frequency; circuit design; decimal frequency division algorithm; diverse digital circuit system; frequency divider; half-integer frequency division; Accuracy; Clocks; Field programmable gate arrays; Frequency conversion; Integrated circuit modeling; Phase locked loops; Radiation detectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Control, Automation and Systems Engineering (CASE), 2011 International Conference on
Conference_Location :
Singapore
Print_ISBN :
978-1-4577-0859-6
Type :
conf
DOI :
10.1109/ICCASE.2011.5997614
Filename :
5997614
Link To Document :
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