Measurements and analyses of substrate noise waveform in mixed signal IC environment

Author

Nagata, Makoto ; Kashima, Yoji ; Tamura, Daisuke ; Morie, Takashi ; Iwata, Atsushi

Author_Institution

Fac. of Eng., Hiroshima Univ., Japan

fYear

1999

fDate

1999

Firstpage

575

Lastpage

578

Abstract

A transition controllable noise source is developed in a 0.4 μm CMOS, P-substrate N-well technology, for experimental studies on substrate noise properties in a mixed signal IC environment. The number of active logic elements, transition directions, and delays can be controlled. Measured substrate noise waveforms with 100 ps time resolution show that peaks in substrate voltage, reflecting logic transition frequencies, have a time constant a few times larger than the switching time. Analyses with equivalent circuits make it clear that this process results from charge transfer between parasitic capacitance of entire logic circuits and an external supply, through supply/return parasitic impedance

Keywords

CMOS integrated circuits; capacitance; electric noise measurement; equivalent circuits; integrated circuit measurement; integrated circuit modelling; integrated circuit noise; mixed analogue-digital integrated circuits; 0.4 micron; CMOS P-substrate N-well technology; active logic elements; charge transfer; delays; equivalent circuits; logic transition frequencies; mixed signal IC environment; parasitic capacitance; substrate noise waveform; substrate voltage peaks; supply/return parasitic impedance; switching time; time constant; transition controllable noise source; CMOS integrated circuits; CMOS logic circuits; CMOS technology; Delay; Frequency measurement; Integrated circuit noise; Noise measurement; Signal resolution; Time measurement; Working environment noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999

Conference_Location

San Diego, CA

Print_ISBN

0-7803-5443-5

Type

conf

DOI

10.1109/CICC.1999.777347

Filename

777347