Title :
A trigger system based on Graphics Processing Unit (GPU)
Author :
Collazuol, Gianmaria ; Lamanna, Gianluca ; Sozzi, Marco
Author_Institution :
INFN Sezione di Pisa, Pontecorvo, Italy
Abstract :
We discuss the possible use of GPUs (Graphics Processing Unit) in the all-digital trigger and data acquisition (TDAQ) chain of the NA62 experiment at CERN. The exponentially growing interest in using GPUs for general purpose applications is based on the impressive performances achieved (peak performance already exceeding the Teraflop/s), on the high bandwidth to memory (hundreds of GB/s) and on the relatively easy high level programming frameworks available. In high energy physics experiments the on-line selection is a fundamental part of the Data acquisition system, in order to reduce the bandwidth requirements and the total amount of data that have to be recorded on tape. The standard trigger chain is structured in several levels realized by custom hardware and software. The computing power of the GPUs allows to design a real time system in which trigger decisions are taken directly in the video processor with a defined maximum latency. This allows building lowest trigger levels based on on standard off-the-shelf PCs with CPU and GPU (instead of the commonly adopted solutions based on custom electronics with FPGA or ASICs) with enhanced and high performance computation capabilities, resulting in high rejection power, high efficiency and simpler low level triggers. In addition also for the higher trigger levels the use of GPUs would help reducing complexity and costs of the PC farms usually exploited for on-line event reconstruction and selection. The ongoing work presented here shows the results achieved for a possible pattern matching application of GPUs to be exploited into the lowest trigger level in NA62. In particular the application is related to particle identification in the RICH detector of the NA62 experiment, where the rate of events to be analyzed will be around 10 MHz. The results obtained in lab tests are very encouraging to go towards a working prototype. Due to the use of off-the-shelf technology, in continuous development for other purposes (Video Games, image editing,...), the architecture described would be easily exported into other experiments, for building powerful, flexible and fully customizable trigger systems.
Keywords :
computer graphic equipment; coprocessors; data acquisition; nuclear electronics; trigger circuits; CERN; CPU; GPU; NA62 experiment; RICH detector; all-digital trigger; computing power; custom hardware; custom software; data acquisition chain; data acquisition system; graphics processing unit; high level programming frameworks; high performance computation capabilities; high rejection power; image editing; maximum latency; online selection; particle identification; pattern matching application; simpler low level triggers; standard off-the-shelf PC; standard trigger chain; trigger decisions; trigger levels; trigger system; video games; video processor; Bandwidth; Computer architecture; Detectors; Graphics processing unit; Hardware; Physics; GPU; Real Time; Trigger; flavor physics; rare decays;
Conference_Titel :
Real Time Conference (RT), 2010 17th IEEE-NPSS
Conference_Location :
Lisbon
Print_ISBN :
978-1-4244-7108-9
DOI :
10.1109/RTC.2010.5750343