A 1 V 900 MHz image-reject downconverter in 0.5 μm CMOS

Author

Long, John R. ; Maliepaard, Michael C.

Author_Institution

Toronto Univ., Ont., Canada

fYear

1999

fDate

1999

Firstpage

665

Lastpage

668

Abstract

A single-chip receiver downconverter circuit consisting of a preamplifier, on-chip trifilar interstage coupling transformer and dual doubly-balanced mixers realizes an image-rejection of 44 dB in a 0.5 μm CMOS technology. The third-order intercept point measured at the receiver input is -4.7 dBm, conversion gain is 13 dB, and the single-sideband (50 Ω) noise figure is 9.3 dB at an input frequency of 900 MHz. The IC consumes 21 mW from a 1 V supply

Keywords

CMOS analogue integrated circuits; UHF frequency convertors; UHF integrated circuits; low-power electronics; radio receivers; 0.5 micron; 1 V; 13 dB; 21 mW; 9.3 dB; 900 MHz; RF front-end; conversion gain; dual doubly-balanced mixer; image rejection; low-voltage CMOS IC; on-chip trifilar interstage coupling transformer; preamplifier; single-chip receiver downconverter circuit; single-sideband noise figure; third-order intercept point; wireless communication; CMOS technology; Coupling circuits; Frequency conversion; Frequency measurement; Gain measurement; Image converters; Mixers; Noise figure; Noise measurement; Preamplifiers;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999

Conference_Location

San Diego, CA

Print_ISBN

0-7803-5443-5

Type

conf

DOI

10.1109/CICC.1999.777368

Filename

777368