The back-end electronics of the time projection chambers in the T2K experiment

Among other detectors, the T2K neutrino experiment comprises three large time projection chambers segmented into over 124.000 electronics channels. The back-end electronics system is designed to distribute a reference clock to the front-end electronics, aggregate event data over seventy-two 2 Gbps optical links and format events that are sent via a standard PC to the global data acquisition system of the experiment. The core of this system is a set of 18 Data Concentrator Cards based on an inexpensive commercial Field Programmable Gate Array evaluation kit with specific add-ons. We describe the adaptations that were made to the original platform, and detail the design of the firmware and software running on the embedded PowerPC processor of the FPGA of a Data Concentrator Card. We show how the intrinsic parallelism and a mixed firmware and software implementation of the data reduction and acquisition tasks lead to a flexible system capable of extracting in real time meaningful information from the 2.5 GByte/s of raw event data produced by the front-end electronics at a nominal rate of 20 Hz.