Title :
Non-complimentary rewriting and serial-data coding scheme for shared-sense-amplifier open-bit-line DRAMs
Author :
Utsugi, S. ; Hanyu, M. ; Muramatsu, Y. ; Sugibayashi, T.
Author_Institution :
ULSI Device Dev. Lab., NEC Corp., Sagamihara, Japan
Abstract :
A non-complimentary rewriting scheme is proposed for open-bit-line DRAMs adopting shared-sub-sense amplifier. The scheme can theoretically cancel inter-bit-line coupling noise down to zero. In order to suppress the peak in word-line noise, a serial-data coding scheme was also developed. This scheme can reduce word-line noise to at least 50%. These two circuits were applied to an experimental 1 Gb DRAM using 0.22 /spl mu/m CMOS process technology for file applications.
Keywords :
CMOS memory circuits; DRAM chips; VLSI; encoding; integrated circuit noise; 0.22 micron; 1 Gbit; CMOS process technology; file applications; inter-bit-line coupling noise cancellation; noncomplementary rewriting scheme; open-bit-line DRAMs; serial-data coding scheme; shared-sub-sense amplifier; word-line noise reduction; Circuit noise; Coupling circuits; Noise cancellation; Noise level; Noise reduction; Operational amplifiers; Random access memory; Switches; Switching circuits; Voltage;
Conference_Titel :
VLSI Circuits, 1998. Digest of Technical Papers. 1998 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-4766-8
DOI :
10.1109/VLSIC.1998.687989
