DocumentCode
2953902
Title
Analysis and optimization of accumulation-mode varactor for RF ICs
Author
Soorapanth, T. ; Yue, C.P. ; Shaeffer, D.K. ; Lee, T.I. ; Wong, S.S.
Author_Institution
Center for Integrated Syst., Stanford Univ., CA, USA
fYear
1998
fDate
11-13 June 1998
Firstpage
32
Lastpage
33
Abstract
This paper presents a novel RF IC varactor implemented in a standard CMOS process. This device has shown a remarkable tuning range of 150%, sensitivity of 300%/V, and quality factor of 23 at 1 GHz. A physical model of the varactor is presented and confirmed with measured data. Using the model derived, optimization has shown that a Q as high as 200 can be achieved.
Keywords
CMOS integrated circuits; Q-factor; UHF diodes; UHF integrated circuits; capacitance; circuit tuning; equivalent circuits; integrated circuit modelling; semiconductor device models; varactors; 1 GHz; RF ICs; accumulation-mode varactor; optimization; physical model; quality factor; sensitivity; standard CMOS process; tuning range; CMOS process; Capacitance; MOS capacitors; Q factor; Radio frequency; Semiconductor device modeling; Silicon; Surface resistance; Tuning; Varactors;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 1998. Digest of Technical Papers. 1998 Symposium on
Conference_Location
Honolulu, HI, USA
Print_ISBN
0-7803-4766-8
Type
conf
DOI
10.1109/VLSIC.1998.687993
Filename
687993
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