Performance analysis of a 64-point FFT/IFFT block designed for OFDM technique used in WLANs

In this paper, the architecture of a 64-point FFT for the OFDM technique used in WLAN standards is proposed. FFT is a complex function whose computational accuracy, hardware size and processing speed depends on the type of arithmetic format used to implement it. Due to the non-linearity of FFT, its computational accuracy is not easy to calculate theoretically. Therefore statistical or simulation methods are used. A simulation method to calculate the performance (hardware size, computational accuracy) of the FFT, based on fixed-point and floating-point formats, has been used. The paper demonstrates how a simple 64-point FFT, based on the fixed point arithmetic format has a performance comparable to that of a complex floating point arithmetic format. Comparison has been made between a fixed point FFT simulation model and a floating point reference model. The results deduced from comparison have shown that both the approaches provide similar results. However, use of simple FFT model greatly reduces the size of the hardware to be used to implement the OFDM technique