Title :
Design of a high speed cascaded sigma-delta ADC
Author :
Xiaofang, Zhou ; Hao, Min ; Chen-Jung, Lee
Author_Institution :
Key State Lab., Fudan Univ., Shanghai, China
Abstract :
A high speed ΣΔ ADC is designed for video application. A multi-bit cascaded ΣΔ modulator is used to gain additional resolution under the oversampling rate of 4 or 8. Quantization errors are analyzed. Multi-stage halfband filters are used to remove the quantization error out of the base band. Simulation results are included
Keywords :
cascade networks; circuit noise; quantisation (signal); sigma-delta modulation; design; high speed cascaded sigma-delta ADC; multibit modulator; multistage halfband filter; oversampling rate; quantization error; resolution; video application; Band pass filters; Baseband; Delta-sigma modulation; Finite impulse response filter; Hardware design languages; Matched filters; Noise shaping; Nonlinear filters; Quantization; Semiconductor device noise;
Conference_Titel :
ASIC, 1996., 2nd International Conference on
Conference_Location :
Shanghai
Print_ISBN :
7-5439-0940-5
DOI :
10.1109/ICASIC.1996.562802
