DocumentCode :
2955563
Title :
FPGA-based MPEG2 decoder
Author :
Habib, S.E.-D. ; Abdelhalim, M.B. ; Salama, A.E. ; Darwish, A. ; Galal, A.M. ; Talkhan, E.A.
Author_Institution :
Fac. of Eng., Cairo Univ., Giza, Egypt
fYear :
2002
fDate :
11-13 Dec. 2002
Firstpage :
194
Lastpage :
197
Abstract :
This paper describes the design and implementation of a full custom, FPGA-based MPEG2 decoder. This FPGA design is attractive for its inherent In Circuit Configurability (ICR) and In Circuit programmability (ISP) capabilities. As such, this design is suitable for low cost, multi-standard, standard video decoders.
Keywords :
decoding; field programmable gate arrays; telecommunication standards; video coding; FPGA-based decoder; ICR; ISP; MPEG2 decoder; circuit configurability; in circuit programmability; video decoder; Circuits; Cities and towns; Costs; Decoding; Engines; Field programmable gate arrays; Hardware; Satellites; Teleconferencing; Telephony;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, The 14th International Conference on 2002 - ICM
Print_ISBN :
0-7803-7573-4
Type :
conf
DOI :
10.1109/ICM-02.2002.1161528
Filename :
1161528
Link To Document :
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