Title :
FPGA implementation of a UMTS turbo coder/decoder
Author :
Francis, C. ; Farah, J. ; Chendeb, M. ; Kassem, F.
Author_Institution :
Eng. Fac., Lebanese Univ., Tripoli, Lebanon
Abstract :
The aim of this paper is to implement a Third Generation Mobile Communication turbo-coder and a turbo-decoder in an FPGA circuit in order to evaluate the architecture complexity of both devices. The implemented devices are to be coupled to a Digital Signal Processor in charge of all signal processing base-band operations in a third generation mobile terminal.
Keywords :
3G mobile communication; circuit complexity; digital signal processing chips; field programmable gate arrays; turbo codes; FPGA circuit; UMTS; architecture complexity; base-band operations; digital signal processor; signal processing; third generation mobile terminal; turbo coder; turbo decoder; 3G mobile communication; Bit error rate; Convolution; Digital signal processors; Field programmable gate arrays; Iterative algorithms; Iterative decoding; Maximum likelihood decoding; Turbo codes; Viterbi algorithm;
Conference_Titel :
Microelectronics, The 14th International Conference on 2002 - ICM
Print_ISBN :
0-7803-7573-4
DOI :
10.1109/ICM-02.2002.1161529
