DocumentCode
2955953
Title
A 3 V, 2.8 mW CMOS /spl Delta//spl Sigma/-modulator for GSM applications
Author
Burger, T. ; Qiuting Huang
Author_Institution
Integrated Syst. Lab., Fed. Inst. of Technol., Zurich, Switzerland
fYear
1998
fDate
11-13 June 1998
Firstpage
90
Lastpage
91
Abstract
A 3V, 2.8 mW /spl Delta//spl Sigma/-modulator for mobile radio applications has been implemented in a 0.5 /spl mu/m CMOS technology. The circuit has a dynamic range of 86 dB for a 100 kHz input signal bandwidth and achieves a maximum signal to noise and distortion ratio of 81 dB. Power consumption has been minimized by optimal OTA design for just the required speed, and by striking a careful balance between quantization and circuit noise.
Keywords
CMOS integrated circuits; cellular radio; delta-sigma modulation; modulators; operational amplifiers; transceivers; 0.5 micron; 100 kHz; 2.8 mW; 3 V; 81 dB; CMOS /spl Delta//spl Sigma/-modulator; CMOS technology; GSM applications; circuit noise; delta-sigma modulator; dynamic range; mobile radio applications; optimal OTA design; quantization noise; Bandwidth; CMOS technology; Circuit noise; Distortion; Dynamic range; Energy consumption; GSM; Land mobile radio; Quantization; Signal to noise ratio;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 1998. Digest of Technical Papers. 1998 Symposium on
Conference_Location
Honolulu, HI, USA
Print_ISBN
0-7803-4766-8
Type
conf
DOI
10.1109/VLSIC.1998.688012
Filename
688012
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