DocumentCode :
2956085
Title :
Burst Error Detection Hybrid ARQ with Crosstalk-Delay Reduction for Reliable On-chip Interconnects
Author :
Fu, Bo ; Ampadu, Paul
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Rochester, Rochester, NY, USA
fYear :
2009
fDate :
7-9 Oct. 2009
Firstpage :
440
Lastpage :
448
Abstract :
We present a hybrid ARQ (HARQ) scheme using single-error correcting burst-error detecting (SEC-BED) codes to address multiple errors in nanoscale on-chip interconnects. For a given residual flit error rate requirement, the proposed HARQ method yields 20% energy improvement over other burst error correction schemes. By further integrated with skewed transitions, the proposed HARQ method can efficiently improve the error resilience against burst errors and also reduce delay uncertainty caused by capacitive coupling. The low overhead of our approach makes it suitable for implementation in reliable and energy efficient on-chip communication.
Keywords :
automatic repeat request; crosstalk; delays; error correction codes; error detection; error detection codes; integrated circuit interconnections; reliability; automatic repeat request; burst error detection hybrid ARQ; capacitive coupling; crosstalk-delay reduction; delay uncertainty; energy efficient on-chip communication; error resilience; on-chip interconnect reliability; residual flit error rate requirement; single-error correcting burst-error detecting codes; skewed transitions; Automatic repeat request; Computer errors; Crosstalk; Delay; Electrical fault detection; Error correction; Error correction codes; Forward error correction; System-on-a-chip; Uncertainty;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2009. DFT '09. 24th IEEE International Symposium on
Conference_Location :
Chicago, IL
ISSN :
1550-5774
Print_ISBN :
978-0-7695-3839-6
Type :
conf
DOI :
10.1109/DFT.2009.45
Filename :
5372227
Link To Document :
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