Workload-Cognizant Impact Analysis and its Applications in Error Detection and Tolerance in Modern Microprocessors

This paper discusses the relative importance of errors in a modern microprocessor based on the impact that they incur on the execution of typical workload. These information can prove immensely useful in allocating resources to enhance on-line testability and error resilience through concurrent error detection/correction methods. This paper also presents an extensive fault simulation infrastructure which is being developed around a superscalar, dynamically- scheduled, out-of-order, Alpha-like microprocessor, which supports execution of SPEC2000 integer benchmarks and enables the aforementioned correlation study.