• DocumentCode
    2956373
  • Title

    Fault-Tolerant Routing Algorithm for Network on Chip without Virtual Channels

  • Author

    Fukushima, Yusuke ; Fukushi, Masaru ; Horiguchi, Susumu

  • Author_Institution
    Grad. Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan
  • fYear
    2009
  • fDate
    7-9 Oct. 2009
  • Firstpage
    313
  • Lastpage
    321
  • Abstract
    Constructing 2D mesh topology network on chips (NoCs) without using virtual channels becomes attractive approach to building future massive multi-core computer systems because of its large amount of bandwidths, less design complexity, and less space consumption of routers. Dead lock problem on NoC is critical because it makes data transmission between nodes unreachable, and inevitable failures in hardware make mesh topology irregular. Although several fault-tolerant techniques are available, deadlock-free routing control algorithm for irregular mesh topology is promising approach to utilize large amount of bandwidths of NoC. The main drawback of available routing control algorithms is that many healthy nodes are deactivated to guarantee deadlock-freeness, and a number of deactivated nodes lead to traffic congestion. In this paper, we propose new fault-tolerant routing algorithm on 2D mesh topology NoC constructed without using virtual channels. The proposed algorithm is fully analyzed its dead lock-freeness, and the experimental result shows that the proposed algorithm can achieve both less number of deactivated nodes and higher throughput.
  • Keywords
    network routing; network-on-chip; 2D mesh topology; NoC; data transmission; deadlock-free routing control algorithm; fault-tolerant routing algorithm; irregular mesh topology; massive multicore computer systems; network-on-chip; traffic congestion; Bandwidth; Buildings; Computer networks; Data communication; Fault tolerance; Hardware; Network topology; Network-on-a-chip; Routing; System recovery; Network on chips (NoCs); NoC without virtual channels; deadlock-free fault-tolerant routing; mesh topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI Systems, 2009. DFT '09. 24th IEEE International Symposium on
  • Conference_Location
    Chicago, IL
  • ISSN
    1550-5774
  • Print_ISBN
    978-0-7695-3839-6
  • Type

    conf

  • DOI
    10.1109/DFT.2009.41
  • Filename
    5372243