DocumentCode
2956834
Title
Design of a mixed 3.3 V and 5 V PCI I/O buffer
Author
Chen, Deng-Yuan
Author_Institution
Compass Design Autom., San Jose, CA, USA
fYear
1996
fDate
21-24 Oct 1996
Firstpage
336
Lastpage
339
Abstract
Design of a digital 3.3 V powered input/output buffer is presented in this paper. The new buffer, a true CMOS buffer, may work as a 3.3 V input buffer, 3.3 V output buffer, 5 V input buffer as well as 5 V output buffer in the PCI (Peripheral Component Interconnect) signaling environment. The concept of this design may also be used for other I/O and any circuit requiring mixing power and signaling environment
Keywords
CMOS digital integrated circuits; buffer circuits; computer interfaces; computer peripheral equipment; peripheral interfaces; 3.3 V; 5 V; CMOS circuit; Peripheral Component Interconnect signaling; digital powered input/output buffer; mixed PCI I/O buffer; Atherosclerosis; Bidirectional control; Circuit simulation; Diodes; Inverters; MOS devices; Noise reduction; Power supplies; Protection; Virtual private networks;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 1996., 2nd International Conference on
Conference_Location
Shanghai
Print_ISBN
7-5439-0940-5
Type
conf
DOI
10.1109/ICASIC.1996.562822
Filename
562822
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